Rigetti
Rigetti builds superconducting processors using scalable multi-chip technology, available through Amazon Braket and Azure Quantum.
Systems
Qubit counts, fidelities, and dates below are from Rigetti's public materials; as of the documentation review date, public sources read this way, and specifics defer to Rigetti's official announcements.
| System | Qubits | 2-qubit fidelity (reported) | Notes |
|---|---|---|---|
| Ankaa-3 | 84 | 99.5% median (reported) | Single-chip square lattice (Dec 2024); iSWAP / fSim gates |
| Cepheus-1-108Q | 108 | 99.1% median (99.5% targeted 2026) (reported) | Flagship; 3×4 array of twelve 9-qubit chiplets; CZ-native; GA on Braket Apr 2026 |
Native gates & connectivity
| Aspect | Rigetti hardware |
|---|---|
| Native 1-qubit | RX(±π/2), RZ (virtual Z) |
| Native 2-qubit | Ankaa-3: parametric iSWAP / fSim. Cepheus-1-108Q: adiabatic CZ (replaces iSWAP, lower leakage) |
| Connectivity | Tunable-coupler square lattice; Cepheus tiles 9-qubit chiplets with intermodule couplers |
Access routes
Reach Rigetti directly via Quantum Cloud Services (QCS), or through a broker — Amazon Braket, Azure Quantum, or qBraid. Each of these is an adapter workflow only: the open qalgora-Q reference build does not natively submit to Rigetti. Existing Quil / pyQuil programs can come in via OpenQASM.
bell is a predefined kernel from
earlier in these docs.)import qalgora
# Planned Rigetti adapter (via Amazon Braket) — NOT in the open reference build.
# qalgora.set_target("braket",
# machine="arn:aws:braket:us-west-1::device/qpu/rigetti/Cepheus-1-108Q")
# counts = qalgora.sample(bell, shots_count=1000) # bell = predefined kernel
# via Azure: machine="rigetti.qpu.cepheus-1-108q"Chiplet scaling
Rigetti tiles small, individually-tested 9-qubit chiplets into a larger module — Cepheus-1-108Q is a 3×4 array of twelve — scaling qubit count while keeping fabrication yields high. qalgora-Q transpiles to the device's native two-qubit gates and routes across the coupling map. The on-premises Novera QPU (9 qubits) brings the same technology in-house.
References
- Amazon Braket, supported devices documentation. docs.aws.amazon.com
Rigetti
Rigetti 采用可扩展多芯片技术构建超导处理器，可通过 Amazon Braket 和 Azure Quantum 访问。
系统
下方比特数、保真度与日期均来自 Rigetti 公开资料；截至文档核对日期，公开资料如此，具体以 Rigetti 官方公告为准。
| 系统 | 量子比特数 | 双比特保真度（厂商宣称） | 备注 |
|---|---|---|---|
| Ankaa-3 | 84 | 中位数 99.5%（厂商宣称） | 单芯片方形晶格（2024 年 12 月）；iSWAP / fSim 门 |
| Cepheus-1-108Q | 108 | 中位数 99.1%（2026 年目标 99.5%）（厂商宣称） | 旗舰；十二块 9 比特芯粒的 3×4 阵列；CZ 原生门；2026 年 4 月于 Braket GA |
原生门与连通性
| 特性 | Rigetti 硬件 |
|---|---|
| 原生单比特门 | RX(±π/2)，RZ（虚拟 Z） |
| 原生双比特门 | Ankaa-3：参数化 iSWAP / fSim。Cepheus-1-108Q：绝热 CZ（取代 iSWAP，泄漏更低） |
| 连通性 | 可调耦合器方形晶格；Cepheus 以模块间耦合器拼接 9 比特芯粒 |
接入方式
可经 Quantum Cloud Services（QCS）直连 Rigetti，也可通过代理接入——Amazon Braket、Azure Quantum 或 qBraid。以上各路径均仅为适配器流程：开放参考实现并不会原生提交到 Rigetti。现有 Quil / pyQuil 程序可经由 OpenQASM 导入。
import qalgora
# 规划中的 Rigetti 适配器（经 Amazon Braket）—— 开放参考实现中不包含。
# qalgora.set_target("braket",
# machine="arn:aws:braket:us-west-1::device/qpu/rigetti/Cepheus-1-108Q")
# counts = qalgora.sample(bell, shots_count=1000) # bell 为预定义内核
# 经 Azure：machine="rigetti.qpu.cepheus-1-108q"芯粒扩展
Rigetti 将经单独测试的 9 比特小芯粒拼接成更大的模组——Cepheus-1-108Q 即为十二块组成的 3×4 阵列——在保持高制造良率的同时提升量子比特数量。qalgora-Q 将线路转译为设备的原生双比特门，并按耦合图完成布线。本地部署的 Novera QPU（9 比特）则将同一技术引入自有机房。
参考文献
- Amazon Braket, supported devices documentation. docs.aws.amazon.com