IBM Quantum

◐ Design-level API

This page documents qalgora-Q API design, architecture, or adaptation workflows. Code examples illustrate intended usage and are not guaranteed to run in the current reference implementation.

IBM operates a fleet of superconducting processors and the Qiskit Runtime execution service. qalgora-Q documents an IBM workflow via Qiskit Runtime; the open reference build runs locally and falls back to the simulator rather than submitting to IBM hardware.

Hardware

Processor	Qubits	Notes
Eagle (r3)	127	Heavy-hex lattice — legacy generation; still listed on IBM Quantum (e.g. ibm_sherbrooke). Check the IBM device list for current availability.
Heron (r1)	133	Tunable couplers, lower error rates
Heron (r2)	156	Current production workhorse; 250k CLOPS (up to ~340k across the 2026 fleet), median 2-qubit error ~2×10⁻³
Nighthawk	120	Delivered end of 2025; 218 tunable couplers, square lattice (4 nearest neighbours); ~30% more circuit complexity, up to 5,000 two-qubit gates
Loon	experimental	Error-correction testbed — demonstrates the qLDPC building blocks (c-couplers, multi-layer routing, qubit reset) for fault tolerance

Qubit counts, CLOPS and error rates above are indicative as of the doc review date — see the IBM Quantum device page for live, per-device calibration data.

Fabrication moved to a 300 mm wafer line (Albany NanoTech), roughly doubling the iteration rate. Nighthawk is the intended target for the largest circuits (subject to access, queue, and service status); its roadmap reaches 7,500 gates by end of 2026 and up to 1,080 connected qubits across nine modules.

Native gates & connectivity

Aspect	IBM hardware
Native 1-qubit	√X (sx), X, Rz (virtual Z)
Native 2-qubit	ECR / CZ (Heron uses tunable-coupler CZ)
Connectivity	Varies by processor family — see the table below

Processor family	Connectivity
Eagle / earlier Heron	heavy-hex / heavy-hex-like coupling map
Heron r2 / r3	tunable couplers — check the exact device coupling map
Nighthawk	square lattice, four-neighbour connectivity

qalgora-Q transpiles your kernel into this basis and inserts SWAPs to satisfy the coupling map — see Transpilation.

Credentials & access

Export QALGORA_IBM_TOKEN with your IBM Quantum API token.
Open — free, up to 10 min per 28-day window on 100+ qubit systems (active users could opt into +180 min over 12 months from March 2026).
Pay-as-you-go — consumption-based, no commitment.
Flex — project plan, pre-purchase ≥400 min/year.
Premium / On-Prem — enterprise subscription (includes Qiskit Functions) or a fully dedicated on-premises system.

import qalgora
# Planned IBM submission via Qiskit Runtime — requires Qiskit Runtime credentials.
# The open reference build does not submit to IBM hardware; lines below are illustrative.
# export QALGORA_IBM_TOKEN with your IBM Quantum API token
# bell is a predefined example kernel
# qalgora.set_target("ibm", machine="<ibm_backend_name>")   # e.g. ibm_torino; check the current IBM backend list
# job = qalgora.sample_async(bell, shots_count=4000)
# print(job.status())
# print(job.get())

Reference build runs locally — not real hardware

This example targets a remote cloud/QPU, but the open reference build does not submit to a real machine — it warns and falls back to the local CPU statevector simulator, returning simulated results. Submitting to an actual device (e.g. 天衍/TianYan, IBM, IonQ, Origin) requires the vendor’s own SDK and credentials.

Execution modes

IBM's Qiskit Runtime schedules work in three modes; qalgora-Q plans to expose the same — see Execution Modes.

# Planned (requires Qiskit Runtime credentials) — illustrative, not run by the reference build:
# session: dedicated low-latency window for a variational loop
# with qalgora.Session(target="ibm", machine="<ibm_backend_name>"):
#     energy, params = qalgora.vqe(ansatz, hamiltonian, optimizer, parameter_count=n)
#
# batch: many independent jobs scheduled together
# with qalgora.Batch(target="ibm", machine="<ibm_backend_name>") as b:
#     jobs = [qalgora.sample_async(c, shots_count=1000) for c in circuits]

Specification API — not in the open reference build yet

This example shows a qalgora-Q specification API (or a third-party library) that the open reference build does not bundle today. It documents the intended interface; to run code now, use the reference build’s supported core API.

Runtime & transpilation

As of the doc review date the SDK is the Qiskit 2.x series with Rust-accelerated transpilation; Qiskit Runtime uses the V2 primitives (SamplerV2 / EstimatorV2, PUB-based). Check the official releases for the current version.
Parametric compilation compiles a circuit once and reruns it with new parameters — qalgora-Q reuses this for variational sweeps.
Error mitigation (resilience levels) is applied through the primitives and mitigation APIs; a 2025 HPC-accelerated path cut mitigation cost 100×+.

Roadmap to fault tolerance

IBM's path runs Nighthawk → Kookaburra (2026, quantum memory + logic) → Cockatoo (2027, module-to-module) → Starling (2029, the first large-scale fault-tolerant machine — 200 logical qubits, 100M operations, built on qLDPC codes) → Blue Jay (2,000 logical qubits). IBM reports progress on real-time qLDPC decoding and targets verified quantum advantage by end of 2026; treat these as IBM-stated roadmap milestones — see IBM's official announcements for specifics.

From Qiskit

Already have Qiskit circuits or algorithms? Run them unchanged via Qiskit interop, then target IBM hardware by name.

References

IBM Quantum, processor types and hardware documentation. quantum.cloud.ibm.com
IBM, "IBM Delivers New Quantum Processors, Software, and Algorithm Breakthroughs on the Path to Advantage and Fault Tolerance" — Nighthawk (120 qubits, 218 tunable couplers) and Loon, 12 Nov 2025. newsroom.ibm.com

IBM Quantum

◐ 设计接口

本页描述的是 qalgora-Q 的接口设计、架构设计或适配工作流。相关代码用于说明预期用法，当前参考实现不保证可以直接运行。

IBM 运营着一批超导处理器，以及 Qiskit Runtime 执行服务。qalgora-Q 通过 Qiskit Runtime 记录 IBM 工作流；开放参考实现在本地运行并回退到模拟器，而非真正提交到 IBM 硬件。

硬件

处理器	量子比特数	备注
Eagle (r3)	127	重六边形晶格——早期世代；仍在 IBM Quantum 上线（如 ibm_sherbrooke），具体可用性以 IBM 设备列表为准
Heron (r1)	133	可调耦合器，错误率更低
Heron (r2)	156	当前主力生产机；25 万 CLOPS（2026 机队最高约 34 万），双比特错误率中位数约 2×10⁻³
Nighthawk	120	2025 年底交付；218 个可调耦合器，方形晶格（4 近邻）；电路复杂度提升约 30%，可达 5,000 个双比特门
Loon	实验型	纠错验证芯片——演示了通向容错的 qLDPC 关键部件（c 耦合器、多层布线、量子比特重置）

上表的量子比特数、CLOPS 与错误率仅为截至文档核对日期的参考值，具体以 IBM Quantum 设备页实时校准数据为准。

制造已迁至 300 mm 晶圆产线（Albany NanoTech），迭代速度约翻倍。Nighthawk 是用于最大规模线路的预期目标芯片（取决于访问权限、排队与服务状态），其路线图到 2026 年底达 7,500 门，并通过九个模块互联最多 1,080 个量子比特。

原生门与连通性

方面	IBM 硬件
原生单量子比特门	√X (sx), X, Rz (virtual Z)
原生双量子比特门	ECR / CZ（Heron 使用可调耦合器 CZ）
连通性	因处理器系列而异（见下表）

处理器系列	连通性
Eagle / 早期 Heron	heavy-hex / 类 heavy-hex 耦合图
Heron r2 / r3	可调耦合器，需查具体设备耦合图
Nighthawk	方形点阵，四近邻连接

qalgora-Q 将您的内核转译为该门基，并插入 SWAP 门以满足耦合图要求——详见转译。

凭据与访问权限

将 IBM Quantum API 令牌导出为 QALGORA_IBM_TOKEN。
开放（Open）——免费，100+ 比特系统每 28 天最多 10 分钟（2026 年 3 月起活跃用户可申请 12 个月内额外 +180 分钟）。
按量付费——按用量计费，无需承诺。
Flex——项目套餐，预购每年 ≥400 分钟。
高级版 / 本地部署——企业订阅（含 Qiskit Functions），或完全专属的本地部署系统。

import qalgora
# 规划中的 IBM 提交（经 Qiskit Runtime）——需要 Qiskit Runtime 凭据。
# 开放参考实现不会提交到 IBM 硬件；以下为示意代码。
# export QALGORA_IBM_TOKEN with your IBM Quantum API token
# bell 是预定义的示例内核
# qalgora.set_target("ibm", machine="<ibm_backend_name>")   # 例如 ibm_torino；请查当前 IBM 后端列表
# job = qalgora.sample_async(bell, shots_count=4000)
# print(job.status())
# print(job.get())

参考实现仅本地运行 · 非真机

此示例虽指向远程云端/QPU，但开放参考实现不会真正提交到真机 —— 它会给出告警并回退到本地 CPU 态矢量模拟器，返回模拟结果，不会真正提交到天衍等真机。真正提交真机需使用对应厂商的 SDK 与凭证。

执行模式

IBM 的 Qiskit Runtime 以三种执行模式调度任务；qalgora-Q 规划提供相同的模式——详见执行模式。

# 规划中（需要 Qiskit Runtime 凭据）——示意代码，参考实现不会执行：
# session: 变分循环的专用低延迟窗口
# with qalgora.Session(target="ibm", machine="<ibm_backend_name>"):
#     energy, params = qalgora.vqe(ansatz, hamiltonian, optimizer, parameter_count=n)
#
# batch: 一并调度多个独立任务
# with qalgora.Batch(target="ibm", machine="<ibm_backend_name>") as b:
#     jobs = [qalgora.sample_async(c, shots_count=1000) for c in circuits]

规范接口 · 参考实现暂未包含

此示例展示的是 qalgora-Q 规范中的接口（或第三方库），开放参考实现目前尚未内置，仅用于说明预期用法；如需立即运行，请使用参考实现已支持的核心 API。

运行时与转译

截至文档核对日期，SDK 为 Qiskit 2.x 系列，转译由 Rust 加速；Qiskit Runtime 采用 V2 primitives（SamplerV2 / EstimatorV2，基于 PUB）。具体版本以官方发布为准。
参数化编译只需编译一次电路，即可使用新参数反复执行——qalgora-Q 将此机制复用于变分参数扫描。
纠错缓解（韧性等级）通过 primitives 和 mitigation API 应用；2025 年的 HPC 加速路径将缓解成本降低 100 倍以上。

通向容错的路线图

IBM 的路径为 Nighthawk → Kookaburra（2026，量子存储 + 逻辑）→ Cockatoo（2027，模块间互联）→ Starling（2029，首台大规模容错机—— 200 个逻辑比特、1 亿次操作，基于 qLDPC 码）→ Blue Jay（2,000 个逻辑比特）。 IBM 报告在实时 qLDPC 解码上取得进展，并以 2026 年底实现可验证量子优势为目标；上述均为 IBM 自述的路线图里程碑，具体以 IBM 官方公告为准。

来自 Qiskit

已有 Qiskit 电路或算法？通过 Qiskit 互操作原样运行，再按名称指定 IBM 硬件作为目标后端。

参考文献

IBM Quantum, processor types and hardware documentation. quantum.cloud.ibm.com
IBM, "IBM Delivers New Quantum Processors, Software, and Algorithm Breakthroughs on the Path to Advantage and Fault Tolerance" — Nighthawk (120 qubits, 218 tunable couplers) and Loon, 12 Nov 2025. newsroom.ibm.com

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